Stuart Paterson, Director, Information Technology, SEP Is the semiconductor industry turning the corner only to face another wall?

The semiconductor industry is riding high on an up cycle that should see worldwide sales for the first half of 2004 break $100 billion for the first time ever, and annual growth projected to possibly exceed 30%. Semiconductors drive the whole IT industry, from hardware products to software, and are regarded as the principal bellwether for the entire industry fortunes. With this statistic, it appears that the technology downturn is well and truly over.

It is a triumph that is all the sweeter for following one of the slowest recoveries from a down cycle that the industry has ever endured. Many of the major players in the market were forced over the last four years to reduce the impact of this downturn as well as the ever increasing costs of manufacturing leading edge semiconductors by restructuring, forming alliances or spinning out their semiconductor business in a painful and disruptive process.

Recognizing the need for advanced technology, Motorola in March 2002 entered into the Crolles2 Alliance with STMicroelectronics, Philips, and Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC) for the development of next-
generation technology at 90nm and smaller geometries.

Siemens and Motorola both then spun out their semiconductor groups to isolate the poor operating performance of their semiconductor businesses from the main group, creating Infineon and Freescale.

Meanwhile, Hitachi and Mitsubishi Electric merged their semiconductor businesses to create Renesas with sufficient scale to be successful in a market where only the very largest companies are able to afford to compete. As a result of these manoeuvres, the industry has emerged into the upturn fitter, more focused and with more scale.

Yet even in the midst of this recent success there is a strong undercurrent of nervous tension about the future of semiconductor manufacturing. With the market more buoyant than ever, demand is not the problem. The issue is more whether or not the industry will be in a position to give customers the increasing levels of performance they have come to expect year-on-year over the past 20 years, or whether the limits of semiconductor technology are just around the corner.

The knock on effects of that possibility would be far-reaching across the many market sectors dependent on improvements in semiconductor performance for their own development.

Chips that have become cheaper, smaller, yet ever more powerful, have been the driving force behind the continual innovations we’ve seen in mobile phones, cars, digital cameras, LCD TVs, plasma screens and, of course, PCs, to name only few. Many of these new digital products have only become possible at a price acceptable by customers in the past few years due to the high processing power now available to designers at very low cost.

An example of this is SEP portfolio company CSR plc (Cambridge Silicon Radio) which was the first in the world to develop a single chip Bluetooth solution on CMOS and as a result hit the magical $5 price point for this part, igniting market demand for this technology. CSR now has in excess of 60% of the world’s design wins and has grown revenues in a few short years from start-up to over $100m.

Technology advances like these have been facilitated by a cycle of semiconductor improvement which has doubled chip speed and halved costs every 18 months, a performance trajectory that was first predicted in 1965 by Gordon Moore, co-founder of Intel. Moore’s Law, as it came to be known, has held true ever since and has driven the continual and annual improvements to cell phones, cameras and laptops in particular.

But now some factions of the industry fear that within the next two years performance improvements could grind to a halt. The industry’s main concern is that the limits of what is possible with complementary metal-oxide semiconductor (CMOS) technology are now within sight. This could mean that improvements in processing power and battery life and reductions in cost and size will stagnate.

As Stuart Paterson, a Director in SEP’s Information Technology Group explains: “As chips become progressively smaller, it is increasingly difficult to achieve reliability and high performance yield. Transistors are now built in circuits only a few nanometers (nm) apart, which has created a problem of electrical current leaking between circuits.

“This, coupled with the increased heat outputs caused by greater power consumption is making it very difficult to make chips that meet expectations and at acceptable manufacturing yields. Intel’s planned upgrade to the Pentium 4 processor (a chip the size of a fingernail) would have consumed over 150 Watts, the equivalent of a large light bulb. This was just not feasible and as a result the new product will effectively be two Pentium 4 processors strapped together.”

In the wry words of Dr Bernie Meyerson, chief technologist at IBM systems and technology group, speaking at the IEF conference in Prague in May: “Scaling is already dead, and no one has noticed it’s not breathing and the lips have turned blue. Somewhere between 130nm and 90nm everything stopped working. The consequences for the industry are pretty dire.”

Warning shots were fired at the beginning of the year by the Semiconductor Industry Association, an organisation which represents nearly 83% of US semiconductor production. In the 2003 International Technology Roadmap for Semiconductors which was published in January this year, it was forecast that the industry would find itself crashing into a
‘red brick wall’ beyond which there are no currently manufacturable solutions.

Others in the industry are more optimistic, however. Pasquale Pistorio, CEO of STMicroelectronics believes that the industry knows how to master 90 and even 65 nanometer chips, saying: “Many companies have been producing samples for 90nm and I don’t think it will be a dramatic change from the traditional tough generational evolution and the normal difficulties of any node.”Paolo Gargini, director of technology strategy at Intel, agrees, although Intel has also been exploring a
variety of other design options such as more efficient use of electrons, simply making bigger chips, and the dual-core processor design which was announced in May this year. As Gargini is reported to have said: “We cannot let physics beat us!”

At the same time, however, as the industry confronts this technological barrier, it is also facing an economic one, which will make it even harder to master the technological challenges. As new chip designs become increasingly complex, the cost of semiconductor production is soaring, a factor which may drive many vendors out of the market. IBM’s latest chip manufacturing facility is estimated to have cost nearly $3billion and some industry experts believe if rising costs are sustained then a new semiconductor facility in 15-20 years may cost the equivalent of the US GDP to build.

Many longer-term solutions are being touted to the performance problem, such as molecular transistors and carbon nanotubes. While some of these technologies and materials have enormous potential, semiconductor and related technologies will undoubtedly continue to be the basis of IT and electronic products for many years. This is partly because it will be a very long time before these new technologies are a viable alternative, and partly because of the huge investments made in semiconductor facilities by companies like IBM.

“As an investor in information technology, our interest in the immediate future is in companies that have the potential to solve the problem of supplying the continual advances in performance and innovation demanded by the market within the confines of what can be achieved using CMOS technology, rather than relying on pure horsepower improvements each year,” says Stuart Paterson.

One way to do this is through reconfigurability. Use the same piece of silicon for more than one task and reconfigure it so that it is highly optimised for the task in hand. Nallatech, one of the SEP portfolio companies profiled in this issue, is a prime example of lateral innovation in this area.

Another approach to innovation without relying on improvements in CMOS technology is to use new materials, as illustrated by Microemissive Displays, a company which is producing camera displays on a single chip by layering a light emitting polymer on the surface of the CMOS chip. A further SEP portfolio company, Cambridge Semiconductor, is using MEMS technology to complement the existing CMOS substrate to enable improved performance of AC/DC power supply chips.
“The ‘red brick wall’ manufacturing problem of going to sub 90nm geometries is unlikely to prove to be a viable venture capital investment opportunity, due to the slow and expensive pace of this continuing innovation, and we see this as largely being the domain of the big semiconductor manufacturers and universities,” says Stuart Paterson.

He concluded: “However, there are still numerous venture capital opportunities in small fabless start-up companies who subcontract their chip manufacturing to the large fabrication facilities with the latest technology. These young and focused companies are therefore able to compete in the market with disruptive innovations.

Using novel circuits and product designs, their advances will facilitate the continue continuing evolution of computing power and software and fuel the endless demand for new features and products in consumer electronics.”